Expansion bus

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Expansion buses are designed to allow people to mix-and-match peripheral devices and CPUs.


The earliest expansion buses were more-or-less directly connected to the pins of a CPU.

Some early systems had a unified "system bus" that both memory cards and peripherals plugged into, leading to "memory-mapped I/O". Typically a "system bus" is composed of the address bus, the data bus, and the control bus, and often also includes multiple pins dedicated to ground and power rails.

The highly influential expansion bus of the MITS Altair 8800 was apparently an afterthought; all the parts required to make a complete computer system would not be designed in time for the January 1975 launch date, so the second prototype put most of the parts on removable cards intended to plug into sockets on a backplane, so only the backplane and a few cards needed to be done by the January 1975 publishing deadline, and the remaining cards could be put off until later.

That first expansion bus was later named the S-100 bus and standardized as IEEE 696-1983.

In retrospect the general idea of such a "modular system" with easily plugged-in parts turned out to have many other advantages

  • ...
  • reduces the temptation of "creeping featuritis", since more stuff can be added later
  • [FIXME]
  • easy repairability -- the ease of swapping out faulty cards is obvious, but less obvious is the various ways it makes it easier to figure out *which* cards are faulty.
  • "hackability" -- just one card can be quickly replaced with a different version, without requiring the entire system to be completely rebuilt from scratch.
  • ...
  • ...
  • etc.

Also in retrospect, many people (with the advantage of hindsight) have figured out many ways of improving on the S-100 bus.

Gerald Anderson "Jerry" Lawson is known as the "father of the video game cartridge". That original video game cartridge on the market in 1976 (like many later video game cartridges) plugged into a socket that was directly wired to the CPU system bus.

Later systems generally separate high-speed stuff (the CPU, the RAM, on-board video (if any), graphics card slot (if any), and coprocessors (if any)) (the "Front-side bus") from slower speed stuff (expansion bus slots, off-board cables and ports).

There are two different reasons for this separation: In low-cost microcontrollers, the cost of pins is a significant cost of the whole system, so (a) we can use a much lower-cost packaging (far fewer pins) if we don't expose the address bus or data bus outside the chip (by putting all of the program Flash and data RAM on the same chip as the CPU) (b) using a "narrower" bus to communicate with peripherals also saves a bunch of pins in those peripherals, making them cost less. In high-end systems, the CPU, video, and RAM run much faster than peripherals, so separating the busses allows the CPU to do dozens or hundreds of memory cycles while waiting for a peripheral to handle a single expansion bus cycle.


SparkFun's Qwiic Connect System uses 4-pin JST connectors. It's based on the I2C bus.


Universal EXTension (UEXT) is a connector layout which includes power and three serial buses: UART, I2C, and SPI separately over 10 pins in a 2x5 layout.

Wikipedia: UEXT



Inspired by the 1-wire bus, the BlackNet serial network is an example of an expansion bus with the very modern assumption that microcontrollers are so cheap that we can afford to put one or more on each and every device that plugs into the bus.

RC2014 bus[edit]

"RC2014 is a simple 8 bit Z80 based modular computer. It was designed to be simple. Simple to build, simple to understand, and simple to program."

Backbone Bus[edit]

Backbone is a proposal for a backplane interconnect that supports multiple bus masters.<ref> "Backbone Bus". </ref> Samuel A. Falvo II



The PC/104 standards defines both form factors and computer buses allowing consumers to stack together boards from a variety of manufacturers to produce a customized embedded system.

PC/104 boards are stacked on top of each other like LEGOs, unlike nearly all other expansion buses.

The original PC/104 connectors are electrically the same signals as the IBM PC/AT but with a different, stacking connector.


Parallel ATA (PATA) is also electrically the same signals as the IBM PC/AT, but with a different physical hardware -- PATA uses ribbon-cables and square header pins.

Expansion bus design considerations[edit]

  • latency (often *more* important than bandwidth)
  • How far apart are the ends of the bus (length)?
  • How many data bits to transfer per transaction (data bus width)?
  • how many address bits to transfer per transaction (address bus width)?
  • Dedicated 1 wire line for each address bit and and separate wire for each data bit (easier to test)? Or somehow multiplex 2 or more of those signals (lower cost)?
  • How many peripheral devices can be plugged into the bus at the same time?
  • How many controllers can be plugged into the bus at the same time? (A single controller and everything else are peripherals? Or multi-controller?)
  • Can 2 identical peripherals be plugged into the bus at the same time, and how can software distinguish them?
  • hot-pluggable?
  • fault-tolerant?
  • Fixed, dedicated, unshared interrupt lines from each peripheral to the CPU? Or daisy-chained interrupt line?
  • Fixed maximum number of peripherals per bus? Or daisy-chaining an arbitrary number of peripherals?
  • What's the maximum fanout of the devices that drive the bus? Early TTL-based systems used chips with a typical max fanout of around 5, so "clever" techniques were required to support more than 5 peripherals. Modern high-speed systems often use point-to-point links (fanout of 1) for speed.
  • Backplane? Motherboard? Stacking connectors? Ribbon cables? Something else?
  • Off-the-shelf connectors available from second sources?
  • Rugged connectors that are reliable for hundreds of plug/unplug cycles?
  • stripboard/Veroboard with 0.1″ header sockets?
  • bandwidth

For many years, the bandwidth (the number of bits we can shove across the bus per second) seemed to be so important that we sacrificed many things to increase the bandwidth. But surprisingly often, new systems are specifically designed for *lower* bandwidth in order to regain some of the things that were sacrificed.