Difference between revisions of "Minimig Board v1.0 documentation"
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* [[Minimig Board v1.0 schematic|Schematic]] | * [[Minimig Board v1.0 schematic|Schematic]] | ||
| − | * [[Minimig Board v1.0 issues|Compiled list of | + | :Pin assignments:<br> |
| + | ::[[Minimig Board v1.0 MCU connections|MCU]] | ||
| + | ::[[Minimig Board v1.0 FPGA connections|FPGA]] | ||
| + | ::[[Minimig Board v1.0 SD-MMC connections|SD/MMC]] | ||
| + | ::[[Minimig Board v1.0 MC68000 CPU connections|CPU]] | ||
| + | ::[[Minimig Board v1.0 RAM connections|RAM]] | ||
| + | ::[[Minimig Board v1.0 Clock generator assignments|Clock generator]] | ||
| + | ::[[Minimig Board v1.0 Power assignments|Power]] | ||
| + | ::[[Minimig Board v1.0 Miscellaneous assignments|Miscellaneous]] | ||
| + | |||
| + | * [[Minimig Board v1.0 issues|Compiled list of hardware issues]] | ||
| + | * [[Minimig Board v1.0 components|Components]] | ||
* [[Minimig Board v1.0 mcu firmware|MCU Firmware]] | * [[Minimig Board v1.0 mcu firmware|MCU Firmware]] | ||
* [[Minimig Board v1.0 bootrom|BootROM]] | * [[Minimig Board v1.0 bootrom|BootROM]] | ||
| − | * [[Minimig Board v1.0 verilog sources|Verilog | + | * [[Minimig Board v1.0 verilog sources|Verilog sourcefile descriptions]] |
| + | * [[Minimig Board v1.0 download directory|Download file descriptions]] | ||
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| + | |||
| + | * [[Minimig Board v1.0 signaling|Signaling scheme]] | ||
