Difference between revisions of "DIP"
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{{Under construction}} | {{Under construction}} | ||
| − | Dual in-line package, or DIP, is a chip package with two rows of pins. It can be through-hole mounted or inserted in a socket. | + | '''Dual in-line package''', or '''DIP''', is a chip package with two rows of pins. It can be through-hole mounted or inserted in a socket. Common packages can have anywhere from 4 to 64 pins. |
| + | |||
| + | Other names: ''DIL'', ''PDIP'', ''SDIP'', ''SPDIP'', ''CDIP'', ''CERDIP'' | ||
==0.1" Pitch, 0.3" Wide== | ==0.1" Pitch, 0.3" Wide== | ||
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! rowspan="2" | Drawing | ! rowspan="2" | Drawing | ||
! rowspan="2" | Name | ! rowspan="2" | Name | ||
| + | ! rowspan="2" | # of Pins | ||
! rowspan="2" | Author | ! rowspan="2" | Author | ||
! rowspan="2" | License | ! rowspan="2" | License | ||
| Line 24: | Line 27: | ||
| [[File:DIP4-0.1-0.3.svg|DIP4]] | | [[File:DIP4-0.1-0.3.svg|DIP4]] | ||
| DIP4 | | DIP4 | ||
| + | | 4 | ||
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| Line 35: | Line 39: | ||
| [[File:DIP8-0.1-0.3.svg|DIP8]] | | [[File:DIP8-0.1-0.3.svg|DIP8]] | ||
| DIP8 | | DIP8 | ||
| + | | 8 | ||
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| Line 46: | Line 51: | ||
| [[File:DIP16-0.1-0.3.svg|DIP16]] | | [[File:DIP16-0.1-0.3.svg|DIP16]] | ||
| DIP16 | | DIP16 | ||
| + | | 16 | ||
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| [[File:DIP24-0.1-0.3.svg|DIP24]] | | [[File:DIP24-0.1-0.3.svg|DIP24]] | ||
| DIP24 | | DIP24 | ||
| + | | 24 | ||
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| Line 68: | Line 75: | ||
| [[File:DIP28-0.1-0.3.svg|DIP28]] | | [[File:DIP28-0.1-0.3.svg|DIP28]] | ||
| DIP28 | | DIP28 | ||
| + | | 28 | ||
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| Line 86: | Line 94: | ||
! rowspan="2" | Drawing | ! rowspan="2" | Drawing | ||
! rowspan="2" | Name | ! rowspan="2" | Name | ||
| + | ! rowspan="2" | # of Pins | ||
! rowspan="2" | Author | ! rowspan="2" | Author | ||
! rowspan="2" | License | ! rowspan="2" | License | ||
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| [[File:DIP4-0.1-0.6.svg|DIP4]] | | [[File:DIP4-0.1-0.6.svg|DIP4]] | ||
| DIP4 | | DIP4 | ||
| + | | 4 | ||
| | | | ||
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| Line 110: | Line 120: | ||
| [[File:DIP8-0.1-0.6.svg|DIP8]] | | [[File:DIP8-0.1-0.6.svg|DIP8]] | ||
| DIP8 | | DIP8 | ||
| + | | 8 | ||
| | | | ||
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| Line 121: | Line 132: | ||
| [[File:DIP16-0.1-0.6.svg|DIP16]] | | [[File:DIP16-0.1-0.6.svg|DIP16]] | ||
| DIP16 | | DIP16 | ||
| + | | 16 | ||
| | | | ||
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| Line 132: | Line 144: | ||
| [[File:DIP24-0.1-0.6.svg|DIP24]] | | [[File:DIP24-0.1-0.6.svg|DIP24]] | ||
| DIP24 | | DIP24 | ||
| + | | 24 | ||
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| Line 143: | Line 156: | ||
| [[File:DIP28-0.1-0.6.svg|DIP28]] | | [[File:DIP28-0.1-0.6.svg|DIP28]] | ||
| DIP28 | | DIP28 | ||
| + | | 28 | ||
| | | | ||
| | | | ||
Revision as of 11:52, 11 August 2014
Under Construction
Dual in-line package, or DIP, is a chip package with two rows of pins. It can be through-hole mounted or inserted in a socket. Common packages can have anywhere from 4 to 64 pins.
Other names: DIL, PDIP, SDIP, SPDIP, CDIP, CERDIP
0.1" Pitch, 0.3" Wide
The most common style of DIP packages, with a pitch of 0.1" (2.54 mm) and a row spacing of 0.3".
| Drawing | Name | # of Pins | Author | License | Tested | Download | ||||
|---|---|---|---|---|---|---|---|---|---|---|
| Eagle | gEDA | KiCAD | Protel | ORCAD | ||||||
| DIP4 | DIP4 | 4 | No | |||||||
| DIP8 | DIP8 | 8 | No | |||||||
| DIP16 | DIP16 | 16 | No | |||||||
| DIP24 | DIP24 | 24 | No | |||||||
|
DIP28 | 28 | No | |||||||
0.1" Pitch, 0.6" Wide
A pitch of 0.1" (2.54 mm) and a row spacing of 0.6".
| Drawing | Name | # of Pins | Author | License | Tested | Download | ||||
|---|---|---|---|---|---|---|---|---|---|---|
| Eagle | gEDA | KiCAD | Protel | ORCAD | ||||||
| DIP4 | DIP4 | 4 | No | |||||||
| DIP8 | DIP8 | 8 | No | |||||||
| DIP16 | DIP16 | 16 | No | |||||||
| DIP24 | DIP24 | 24 | No | |||||||
| DIP28 | DIP28 | 28 | No | |||||||
