Editing Xilinx XC3S500E
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Xilinx XC3S500E is logic optimized [[Field-programmable gate array|FPGA]].<br> | Xilinx XC3S500E is logic optimized [[Field-programmable gate array|FPGA]].<br> | ||
[[Xilinx XC3S500E pins]]<br> | [[Xilinx XC3S500E pins]]<br> | ||
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[http://direct.xilinx.com/bvdocs/publications/ds312.pdf Xilinx Spartan-3E Datasheet]<br> | [http://direct.xilinx.com/bvdocs/publications/ds312.pdf Xilinx Spartan-3E Datasheet]<br> | ||
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