Editing Minimig FPGA
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The slow IOs from Paula and the 8520s can be moved to the CPLD.<br> | The slow IOs from Paula and the 8520s can be moved to the CPLD.<br> | ||
− | On a real ECS/OCS Amiga, IOs from the 8520s are updated at 700 | + | On a real ECS/OCS Amiga, IOs from the 8520s are updated at 700 KHz, IOs from Paula/Denise are updated at 3.5 MHz.<br> |
On a real AGA Amiga, the 8520s are slightly faster : the IOs are updated at 1.4 MHz.<br> | On a real AGA Amiga, the 8520s are slightly faster : the IOs are updated at 1.4 MHz.<br> | ||
If we run a high speed bus at 28 MHz between the FPGA and the CPLD, each wire can "transport" 8 IOs from paula or 20 IOs from a 8520.<br> | If we run a high speed bus at 28 MHz between the FPGA and the CPLD, each wire can "transport" 8 IOs from paula or 20 IOs from a 8520.<br> | ||
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[[Xilinx XC3S400 and XC3S500E comparison]]<br> | [[Xilinx XC3S400 and XC3S500E comparison]]<br> | ||
− | [[Xilinx XC3S500E | + | [[Xilinx XC3S500E pins]] |
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