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Minimig 120x120mm PCB board


Minimig (short for "Mini Amiga") is an open source exact FPGA re-implementation of an Amiga 500.

Minimig started life in secrecy around January 2005 as a proof of concept type of deal by the Dutch electrical engineer Dennis van Weeren. He intended Minimig as the answer to the ongoing discussions within the Amiga community on implementing the Amiga Custom Chipset in FPGA and this was released under the open source license GPLv3 on the 25 July 2007.

Original prototype

The original Minimig prototype is based on the Xilinx Spartan-3 Starter Kit, the OCS chipset is synthesized in the FPGA. Two pcb boards are attached via the fpga kit expansion ports. The first one holds a 3.3V M68000 type CPU. The second has MMC memory card slot with the use of a small PIC microcontroller as acting disc controller that supports the FAT16 filesystem and does on-the-fly .ADF decoding.

     VGA-+-PS2  (joystick etc.)
CPU <-> FPGA <-> Microcontroller <-> Flashmemory

The prototype was shown <ref> 060218</ref> at an Amiga meet and loads most Amiga programs although bugs do exist. Coding is done in Verilog because Dennis found VHDL not to be his cup of tea. All done on a PC using Xilinx Webpack software.

Some users have suggested plans to make a joystick style direct-to-tv device for people wanting to play old Amiga games or run software. However a new single board version pcb has been designed, moving away from the Xilinx Starter kit.


  • Run Amiga specific application software to convert files to newer platforms.
  • Run software only available on Amiga.
  • Games.
  • FPGA development experience using Verilog.
  • Creating something for the community.
  • Proof of Concept.
  • Can create new games to take advantages of the new features in Minimig (faster memory, more memory sprites, colours, etc), while maintaining full compatibility with the classic Amiga.



  • Xilinx Spartan-3 400k gate (XC3S400-4PQ208C) FPGA using 60% capacity.
  • Freescale MC68SEC000 (MC68SEC000FU20; MC68SEC000AA20 proposed as replacement part by Freescale), 3,3V, at 7.09379 MHz. (However there's no 'E' clock, MOVE sr,<EA> is privileged and there is no real replacement instruction. This does not seem to affect any programs as of yet however.)
  • Amiga ChipRAM bus and FastRAM merged into a single synchronous bus running at 7.09379 MHz.
  • 2 MB 70 ns SRAM organised as 2 524288*16 banks.
  • MCU PIC 18LF252-I/SP <ref> 070715</ref> (an alternative would be Atmel AVR) implements a FAT16 disclayout and handles loading of fpga configuration and kickstart. Simulates a floppy to the Amiga by encoding on the fly from .ADF files.
  • MMC Flash memory card to load fpga configuration, kickstart and software for the simulated computer.
  • 3× LEDs to display the MC68000 processor run status.
  • Video D/A consists of 4 resistors for each color red, green, blue (4 bits/color) and output via VGA connector. <ref>Minimig schematics v1 Page3</ref>
  • Audio from an 8 bit dithering sigma-delta converter with 2nd order analogue filter.
  • +5V DC main power.




Date Event
2005-03-06 Verilog sources coding started.
2005-12-05 Announcement of the project.
2006 Spring Verilog sources completed.
2006-06-11 Screenshoot of schematic for board v1.0 published.
2006-10-15 Schematic for board v1.0 completed.
2007-06-xx Sources predicted to be released, but weren't.
2007-07-04 Last source edit (core).
2007-07-13 Busy making website for the project.
2007-07-24 Minimig sources released on the official website.



Computer to compile the project:

Shuttle barebone, Prescott Pentium 4 3 GHz, 1 GiB Ram, Software Xilinx Webpack version 6.3.03i (2007-07-22 9.1). Time from source .bit configuration file = 2 minutes. Cache and memory speed is vital for fpga software.

See also



related projects

External links