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| | * [[Motherboards that run Linux#Balloon_Xscale_ARM.2BFPGA_dev_board | Balloon Xscale + FPGA board]] | | * [[Motherboards that run Linux#Balloon_Xscale_ARM.2BFPGA_dev_board | Balloon Xscale + FPGA board]] |
| − | * [[RTL m68k]]
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| | * [[WikiNode | The Open Graphics Project]] (OGP) is developing graphics cards with fully published specs and open source drivers. Since the first version will be a FPGA, is also collecting information on FPGA programming and interfacing. | | * [[WikiNode | The Open Graphics Project]] (OGP) is developing graphics cards with fully published specs and open source drivers. Since the first version will be a FPGA, is also collecting information on FPGA programming and interfacing. |
| | * ... | | * ... |
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| | == VHDL == | | == VHDL == |
| | VHDL (VHSIC hardware description language) is commonly used as a design-entry language for designing digital circuits as field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). | | VHDL (VHSIC hardware description language) is commonly used as a design-entry language for designing digital circuits as field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). |
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| − | == History ==
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| − |
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| − | ... standard logic devices ...
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| − |
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| − | The 1978 programmable array logic ([[PAL]]) was a revolutionary device.
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| − | Previous CPUs were built from a rack of PCBs full of of TTL ICs ([[standard logic CPU]]);
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| − | PALs allowed CPUs that were just as complex to be built from far fewer ICs on less than a dozen PCBs.
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| − | The book "Soul of a New Machine" described the development
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| − | of the "Eagle", one of the first CPUs to use PALs rather than fixed-function TTL ICs ([[TTL CPU]]).<ref>
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| − | [https://www.embeddedrelated.com/showthread/fpga-cpu/1193-1.php "PAL/GAL CPUs?"].
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| − | </ref>
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| − | PAL chips were first introduced in 1978 by MMI (now part of Lattice Semiconductor) and soon second sourced by National Semiconductor, Texas Instruments and AMD.
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| − |
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| − | GAL devices are direct replacements for most PAL, EPLD, and PEEL devices.<ref>
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| − | Lattice Semiconductor.
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| − | [https://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/AD/CopyingPALEPLDandPEELPatternsintoGALDevices.ashx?la=en "Copying PAL, EPLD and PEEL Patterns into GAL Devices"].
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| − | 2002.
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| − | </ref>
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| − | The advantage of GAL and PEEL is that they can be quickly erased and re-programmed, unlike PALs which have one-time-programmable fuses or EPLDs which can only slowly be erased with ultraviolet light through a glass window.
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| − |
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| − | The ispGAL devices are a further improvement: they have JTAG port that supports in-system programmability (ISP), unlike earlier devices that need to be socketed to allow pulling them out of the system, then plugging in a freshly-programmed device. (That JTAG port also supports internal and board-level testing).<ref>
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| − | [https://www.latticesemi.com/support/answerdatabase/2/4/245 "What is the difference between an ispGAL and a GAL device?"]
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| − | </ref>
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| − |
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| − | SPLDs ...
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| − |
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| − | CPLDs ... further improve density ...
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| − | ...
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| − |
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| − | FPGAs ... are even more dense -- entire CPUs can be implemented on a single FPGA IC.
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| − | Some FPGAs have enough capacity to implement multiple CPUs ...
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| − | but they have some drawbacks:
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| − | * most FPGAs reload their configuration on power-up, unlike CPLDs and SPLDs which are instant-on.
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| − | * CPLDs and SPLDs have more predictable timing delays
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| − | * SPLDs often have several second sources
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| − | * building something with some specific FPGA seems to force the designer to use one specific proprietary software tool on one of a narrow range of specific proprietary OSes.<ref>
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| − | Dieter Mueller 2004.
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| − | [http://www.6502.org/users/dieter/mt15/mt15.htm "MT15"].
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| − | quote: "If there would be a standard with FPGAs/CPLDs
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| − | ... allowing me to select
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| − | between parts from different manufacturers with the
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| − | same Pin_out while still working with the same
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| − | (non_proprietary/open_source) software tools,
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| − | this project would not exist."
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| − | </ref>
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| − | * ...
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| − |
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| − |
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| | == Further reading == | | == Further reading == |
