Minimig Board v1.0 schematic

Board schematic for Minimig board v1.0

J1 - Audio output via 3,5mm jack

Voltage level: (3.3V/(560ohm + 560ohm + 32ohm))*32 ohm*1000 = 91,7mV
Back EMF issues?
Head phones

J4 - 4 bit resistor ladder D/A

Notice the resistor of 560 ohm. May cause inlinear output.

in 15kHz mode:

/VSYNC = high (scart RGB enable)

/HSYNC = composite sync

IC5 - FPGA Xilinx XC3S400-4PQ208C

IC3/IC4 - FPGA core power +1,25V +2,5V using LM1117MP-ADJ

FPGA decoupling

J10 - Joystick 0

J6 - Joystick 1

J7 - Jtag

Program & Menu button, 31/15kHz selection, Power & Disc led

J5/J8 - Keyboard & Mouse connections

IC9 - MC68000

MC68000 Decoupling

IC8 - Generation of 4.433619 MHz PAL video MCLK using 74HC4060 (NTSC=3.579545MHz)

PATCH needed to get rev 1 board working:

Disconnect net SPI_DOUT from pin 81 of FPGA.

Connect net SPI_DOUT to pin 19 of FPGA (net USER3).

REASON:

Pin 81 is an output during FPGA config that blocks SPI to MMC during startup.

IC10 - MCU PIC18LF252I/SP (DIP28)

IC6/IC7 - Asynchronous static ram 512 x 16 bit (2 chips)

IC2 - Serial RS232 using MAX232A (SO16), output J3

IC1 - Main power supply

J11 - SD Card slot

J9 - Spare I/O directly connected to FPGA

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