Difference between revisions of "Minimig Selftest"

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Suggestion for how to test the minimig:<br>
 
Suggestion for how to test the minimig:<br>
:Sequence:
+
<pre>
::Jumper 2-3 (MCU TxD)
+
  Sequence:
::MCU(PIC18) verify it's own operation and sends result too TxD  (builtin?)
+
    Jumper 2-3 (MCU TxD)
:::Checks: 20 MHz clock, Flash interface, Rs232(rxd,rts,cts), FPGA jtag
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    MCU(PIC18) verify it's own operation and sends result too TxD  (builtin?)
:::Upload test config-1 to FPGA.
+
      Checks: 20 MHz clock, Flash interface, Rs232(rxd,rts,cts), FPGA jtag
:::Check FPGA selftest is ok.
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      Upload test config-1 to FPGA.
:::Upload test config-2 to FPGA.
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      Check FPGA selftest is ok.
:::FPGA
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      Upload test config-2 to FPGA.
::::Check RAM with patterns.
+
      FPGA
::::Check CPU with opcode run.
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        Check RAM with patterns.
::::Send picture pattern to VGA
+
        Check CPU with opcode run.
::::Check Keyboard with challenge-response.
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        Send picture pattern to VGA
::::Check Mouse with challenge-response.
+
        Check Keyboard with challenge-response.
::::Send 1 kHz to Left => Silence => 2 kHz Right => Silence => Repeat..
+
        Check Mouse with challenge-response.
::::Display joystick1 + joystick2 + keyboard + mouse  
+
        Send 1 kHz to Left => Silence => 2 kHz Right => Silence => Repeat..
 +
        Display joystick1 + joystick2 + keyboard + mouse  
  
:Testing FPGA:
+
  Testing FPGA:
::Latch -> ALU+1 -> Latch -> ALU+1 -> Latch -> Repeat..
+
    Latch -> ALU+1 -> Latch -> ALU+1 -> Latch -> Repeat..
 +
</pre>
 +
<br>
 +
A test would be useful for building or when a malfunction is suspected.<br>
  
<br>
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* [http://uae.coresystems.de/test UAE test tools]
A test would be useful to test the board when building or when a malfunction is suspected.<br>
 

Latest revision as of 10:41, 20 August 2007

Suggestion for how to test the minimig:

  Sequence:
    Jumper 2-3 (MCU TxD)
    MCU(PIC18) verify it's own operation and sends result too TxD  (builtin?)
      Checks: 20 MHz clock, Flash interface, Rs232(rxd,rts,cts), FPGA jtag
      Upload test config-1 to FPGA.
      Check FPGA selftest is ok.
      Upload test config-2 to FPGA.
      FPGA
        Check RAM with patterns.
        Check CPU with opcode run.
        Send picture pattern to VGA
        Check Keyboard with challenge-response.
        Check Mouse with challenge-response.
        Send 1 kHz to Left => Silence => 2 kHz Right => Silence => Repeat..
        Display joystick1 + joystick2 + keyboard + mouse 

  Testing FPGA:
    Latch -> ALU+1 -> Latch -> ALU+1 -> Latch -> Repeat..


A test would be useful for building or when a malfunction is suspected.