Difference between revisions of "Minimig Selftest"

From OpenCircuits
Jump to navigation Jump to search
(selftest pseudo)
 
(why)
Line 20: Line 20:
 
     Latch -> ALU+1 -> Latch -> ALU+1 -> Latch -> Repeat..
 
     Latch -> ALU+1 -> Latch -> ALU+1 -> Latch -> Repeat..
 
</pre>
 
</pre>
 +
<br>
 +
This is useful to test when building the card or when a malfunction is suspected.<br>

Revision as of 11:16, 27 July 2007

Suggestion for how to test the minimig:

  Sequence:
    Jumper 2-3 (MCU TxD)
    MCU(PIC18) verify it's own operation and sends result too TxD  (builtin?)
      Checks: 20 MHz clock, Flash interface, Rs232(rxd,rts,cts), FPGA jtag
      Upload test config-1 to FPGA.
      Check FPGA selftest is ok.
      Upload test config-2 to FPGA.
      FPGA
        Check RAM with patterns.
        Check CPU with opcode run.
        Send picture pattern to VGA
        Check Keyboard with challenge-response.
        Check Mouse with challenge-response.
        Send 1 kHz to Left => Silence => 2 kHz Right => Silence => Repeat..
        Display joystick1 + joystick2 + keyboard + mouse 

  Testing FPGA:
    Latch -> ALU+1 -> Latch -> ALU+1 -> Latch -> Repeat..


This is useful to test when building the card or when a malfunction is suspected.