Editing Relay CPU
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Is it possible to build a relay CPU from significantly fewer relays? | Is it possible to build a relay CPU from significantly fewer relays? | ||
− | In particular, is | + | In particular, is is possible to build a relay CPU from 100 relays or less? |
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Perhaps we should have 2 categories: | Perhaps we should have 2 categories: | ||
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building a computer (except for the RAM and program storage) out of relays: | building a computer (except for the RAM and program storage) out of relays: | ||
we have 2 slightly-contradictory desires: | we have 2 slightly-contradictory desires: | ||
− | + | * would be nice to use the fewest number of relays, because each one will need | |
− | + | to be hand-wired, and each "on" coil dissipates power. | |
− | to be hand-wired, and each "on" coil dissipates power. | + | * would be nice to do a bunch of work on each clock cycle, so we can get the |
− | + | same amount of work done in fewer clock cycles, reducing wear-and-tear on | |
− | + | the relays ... and if the relays are optimally driven (approximate with "snubber" in series with coil, where the snubber is a parallel RC), it takes less power | |
− | same amount of work done in fewer clock cycles, reducing wear-and-tear on | ||
− | the relays ... and if the relays are optimally driven (approximate with "snubber" in series with coil, where the snubber is a parallel RC), it takes less power | ||
to "hold" the relay than to switch states. | to "hold" the relay than to switch states. | ||
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I suspect that balancing these 2 requirements is very similar to optimizing | I suspect that balancing these 2 requirements is very similar to optimizing | ||
similar requirements for minimizing power in purely solid-state logic. | similar requirements for minimizing power in purely solid-state logic. | ||
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Perhaps gives some sort of display to indicate which byte is different. | Perhaps gives some sort of display to indicate which byte is different. | ||
* a "compile" relay machine: | * a "compile" relay machine: | ||
− | runs a compiler executable ( | + | runs a compiler executable (off one SD/MMC card?), |
with the source code to some ancestor compiler (on another SD/MMC card?), | with the source code to some ancestor compiler (on another SD/MMC card?), | ||
− | and store the resulting executable | + | and store the resulting executable on a SD/MMC card. |
Then the DDC process is something like: | Then the DDC process is something like: | ||
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The Six Bit Machine | The Six Bit Machine | ||
by Jack Eisenmann | by Jack Eisenmann | ||
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http://web.me.com/teisenmann/sixbit/main.html | http://web.me.com/teisenmann/sixbit/main.html | ||
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so I can directly hook the output to a data bus | so I can directly hook the output to a data bus | ||
without worrying about "backfeeding" signals flipping bits in the register. | without worrying about "backfeeding" signals flipping bits in the register. | ||
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